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authorJörg Frings-Fürst <debian@jff-webhosting.net>2022-06-30 19:34:42 +0200
committerJörg Frings-Fürst <debian@jff-webhosting.net>2022-06-30 19:34:42 +0200
commit4461f1524993be7dfae48ed620c13d52bb6ae4ad (patch)
tree228efb5d6b2e35829e9694b42bdbc8e917a579a8
parentebef811fce038c382fb66ecd728c9d885460263b (diff)
New upstream version 3.4upstream/3.4
-rw-r--r--AUTHORS6
-rw-r--r--NEWS19
-rw-r--r--dmidecode.c682
-rw-r--r--dmidecode.h16
-rw-r--r--dmioem.c576
-rw-r--r--dmioem.h2
-rw-r--r--man/biosdecode.811
-rw-r--r--man/dmidecode.8114
-rw-r--r--man/ownership.86
-rw-r--r--man/vpddecode.827
-rw-r--r--version.h2
11 files changed, 1182 insertions, 279 deletions
diff --git a/AUTHORS b/AUTHORS
index 748b985..7065f72 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -21,6 +21,9 @@ Roy Franz <roy.franz@linaro.org>
Tyler Bell <tyler.bell@hp.com>
Xie XiuQi <xiexiuqi@huawei.com>
Petr Oros <poros@redhat.com>
+Prabhakar Pujeri <prabhakar.pujeri@dell.com>
+Erwan Velu <e.velu@criteo.com>
+Jerry Hoemann <jerry.hoemann@hpe.com>
MANY THANKS TO (IN CHRONOLOGICAL ORDER)
Werner Heuser
@@ -90,3 +93,6 @@ Andrey Matveyev
Stefan Tauner
Naga Chumbalkar
Jens Rosenboom
+Lianbo Jiang
+Tianjia Zhang
+Ivan Tkachenko
diff --git a/NEWS b/NEWS
index cd950d8..b470da5 100644
--- a/NEWS
+++ b/NEWS
@@ -1,3 +1,22 @@
+Version 3.4 (Mon Jun 27 2022)
+ - Support for SMBIOS 3.4.0. This includes new memory device types, new
+ processor upgrades, new slot types and characteristics, decoding of memory
+ module extended speed, new system slot types, new processor characteristics
+ and new format of Processor ID.
+ - Support for SMBIOS 3.5.0. This includes new processor upgrades, BIOS
+ characteristics, new slot characteristics, new on-board device types, new
+ pointing device interface types, and a new record type (type 45 -
+ Firmware Inventory Information).
+ - Decode HPE OEM records 194, 199, 203, 236, 237, 238 ans 240.
+ - Bug fixes:
+ Fix OEM vendor name matching
+ Fix ASCII filtering of strings
+ Fix crash with option -u
+ - Minor improvements:
+ Skip details of uninstalled memory modules
+ Don't display the raw CPU ID in quiet mode
+ Improve the formatting of the manual pages
+
Version 3.3 (Wed Oct 14 2020)
- [BUILD] Allow overriding build settings from the environment.
- [COMPATIBILITY] Document how the UUID fields are interpreted.
diff --git a/dmidecode.c b/dmidecode.c
index cd2b5c9..9aeff91 100644
--- a/dmidecode.c
+++ b/dmidecode.c
@@ -85,7 +85,9 @@
#define out_of_spec "<OUT OF SPEC>"
static const char *bad_index = "<BAD INDEX>";
-#define SUPPORTED_SMBIOS_VER 0x030300
+enum cpuid_type cpuid_type = cpuid_none;
+
+#define SUPPORTED_SMBIOS_VER 0x030500
#define FLAG_NO_FILE_OFFSET (1 << 0)
#define FLAG_STOP_AT_EOT (1 << 1)
@@ -116,7 +118,7 @@ static void ascii_filter(char *bp, size_t len)
size_t i;
for (i = 0; i < len; i++)
- if (bp[i] < 32 || bp[i] == 127)
+ if (bp[i] < 32 || bp[i] >= 127)
bp[i] = '.';
}
@@ -201,12 +203,15 @@ static const char *dmi_smbios_structure_type(u8 code)
"Additional Information",
"Onboard Device",
"Management Controller Host Interface",
- "TPM Device", /* 43 */
+ "TPM Device",
+ "Processor",
+ "Firmware",
+ "String Property" /* 46 */
};
if (code >= 128)
return "OEM-specific";
- if (code <= 43)
+ if (code <= 46)
return type[code];
return out_of_spec;
}
@@ -248,9 +253,9 @@ static void dmi_dump(const struct dmi_header *h)
{
int j, l = strlen(s) + 1;
- off = 0;
for (row = 0; row < ((l - 1) >> 4) + 1; row++)
{
+ off = 0;
for (j = 0; j < 16 && j < l - (row << 4); j++)
off += sprintf(raw_data + off,
j ? " %02X" : "%02X",
@@ -267,7 +272,7 @@ static void dmi_dump(const struct dmi_header *h)
}
/* shift is 0 if the value is in bytes, 1 if it is in kilobytes */
-static void dmi_print_memory_size(const char *attr, u64 code, int shift)
+void dmi_print_memory_size(const char *attr, u64 code, int shift)
{
unsigned long capacity;
u16 split[7];
@@ -424,11 +429,13 @@ static void dmi_bios_characteristics_x2(u8 code)
"Function key-initiated network boot is supported",
"Targeted content distribution is supported",
"UEFI is supported",
- "System is a virtual machine" /* 4 */
+ "System is a virtual machine",
+ "Manufacturing mode is supported",
+ "Manufacturing mode is enabled" /* 6 */
};
int i;
- for (i = 0; i <= 4; i++)
+ for (i = 0; i <= 6; i++)
if (code & (1 << i))
pr_list_item("%s", characteristics[i]);
}
@@ -1037,108 +1044,48 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
}
}
-static void dmi_processor_id(const struct dmi_header *h)
+static enum cpuid_type dmi_get_cpuid_type(const struct dmi_header *h)
{
- /* Intel AP-485 revision 36, table 2-4 */
- static const char *flags[32] = {
- "FPU (Floating-point unit on-chip)", /* 0 */
- "VME (Virtual mode extension)",
- "DE (Debugging extension)",
- "PSE (Page size extension)",
- "TSC (Time stamp counter)",
- "MSR (Model specific registers)",
- "PAE (Physical address extension)",
- "MCE (Machine check exception)",
- "CX8 (CMPXCHG8 instruction supported)",
- "APIC (On-chip APIC hardware supported)",
- NULL, /* 10 */
- "SEP (Fast system call)",
- "MTRR (Memory type range registers)",
- "PGE (Page global enable)",
- "MCA (Machine check architecture)",
- "CMOV (Conditional move instruction supported)",
- "PAT (Page attribute table)",
- "PSE-36 (36-bit page size extension)",
- "PSN (Processor serial number present and enabled)",
- "CLFSH (CLFLUSH instruction supported)",
- NULL, /* 20 */
- "DS (Debug store)",
- "ACPI (ACPI supported)",
- "MMX (MMX technology supported)",
- "FXSR (FXSAVE and FXSTOR instructions supported)",
- "SSE (Streaming SIMD extensions)",
- "SSE2 (Streaming SIMD extensions 2)",
- "SS (Self-snoop)",
- "HTT (Multi-threading)",
- "TM (Thermal monitor supported)",
- NULL, /* 30 */
- "PBE (Pending break enabled)" /* 31 */
- };
const u8 *data = h->data;
const u8 *p = data + 0x08;
- u32 eax, edx;
- int sig = 0;
u16 type;
type = (data[0x06] == 0xFE && h->length >= 0x2A) ?
WORD(data + 0x28) : data[0x06];
- /*
- * This might help learn about new processors supporting the
- * CPUID instruction or another form of identification.
- */
- pr_attr("ID", "%02X %02X %02X %02X %02X %02X %02X %02X",
- p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
-
if (type == 0x05) /* 80386 */
{
- u16 dx = WORD(p);
- /*
- * 80386 have a different signature.
- */
- pr_attr("Signature",
- "Type %u, Family %u, Major Stepping %u, Minor Stepping %u",
- dx >> 12, (dx >> 8) & 0xF,
- (dx >> 4) & 0xF, dx & 0xF);
- return;
+ return cpuid_80386;
}
- if (type == 0x06) /* 80486 */
+ else if (type == 0x06) /* 80486 */
{
u16 dx = WORD(p);
/*
* Not all 80486 CPU support the CPUID instruction, we have to find
- * wether the one we have here does or not. Note that this trick
+ * whether the one we have here does or not. Note that this trick
* works only because we know that 80486 must be little-endian.
*/
if ((dx & 0x0F00) == 0x0400
&& ((dx & 0x00F0) == 0x0040 || (dx & 0x00F0) >= 0x0070)
&& ((dx & 0x000F) >= 0x0003))
- sig = 1;
+ return cpuid_x86_intel;
else
- {
- pr_attr("Signature",
- "Type %u, Family %u, Model %u, Stepping %u",
- (dx >> 12) & 0x3, (dx >> 8) & 0xF,
- (dx >> 4) & 0xF, dx & 0xF);
- return;
- }
+ return cpuid_80486;
}
else if ((type >= 0x100 && type <= 0x101) /* ARM */
|| (type >= 0x118 && type <= 0x119)) /* ARM */
{
- u32 midr = DWORD(p);
/*
- * The format of this field was not defined for ARM processors
- * before version 3.1.0 of the SMBIOS specification, so we
- * silently skip it if it reads all zeroes.
+ * The field's format depends on the processor's support of
+ * the SMCCC_ARCH_SOC_ID architectural call. Software can determine
+ * the support for SoC ID by examining the Processor Characteristics field
+ * for "Arm64 SoC ID" bit.
*/
- if (midr == 0)
- return;
- pr_attr("Signature",
- "Implementor 0x%02x, Variant 0x%x, Architecture %u, Part 0x%03x, Revision %u",
- midr >> 24, (midr >> 20) & 0xF,
- (midr >> 16) & 0xF, (midr >> 4) & 0xFFF, midr & 0xF);
- return;
+ if (h->length >= 0x28
+ && (WORD(data + 0x26) & (1 << 9)))
+ return cpuid_arm_soc_id;
+ else
+ return cpuid_arm_legacy;
}
else if ((type >= 0x0B && type <= 0x15) /* Intel, Cyrix */
|| (type >= 0x28 && type <= 0x2F) /* Intel */
@@ -1148,7 +1095,7 @@ static void dmi_processor_id(const struct dmi_header *h)
|| (type >= 0xCD && type <= 0xCF) /* Intel */
|| (type >= 0xD2 && type <= 0xDB) /* VIA, Intel */
|| (type >= 0xDD && type <= 0xE0)) /* Intel */
- sig = 1;
+ return cpuid_x86_intel;
else if ((type >= 0x18 && type <= 0x1D) /* AMD */
|| type == 0x1F /* AMD */
|| (type >= 0x38 && type <= 0x3F) /* AMD */
@@ -1157,7 +1104,7 @@ static void dmi_processor_id(const struct dmi_header *h)
|| (type >= 0x83 && type <= 0x8F) /* AMD */
|| (type >= 0xB6 && type <= 0xB7) /* AMD */
|| (type >= 0xE4 && type <= 0xEF)) /* AMD */
- sig = 2;
+ return cpuid_x86_amd;
else if (type == 0x01 || type == 0x02)
{
const char *version = dmi_string(h, data[0x10]);
@@ -1170,41 +1117,168 @@ static void dmi_processor_id(const struct dmi_header *h)
|| strncmp(version, "Intel(R) Core(TM)2", 18) == 0
|| strncmp(version, "Intel(R) Pentium(R)", 19) == 0
|| strcmp(version, "Genuine Intel(R) CPU U1400") == 0)
- sig = 1;
+ return cpuid_x86_intel;
else if (strncmp(version, "AMD Athlon(TM)", 14) == 0
|| strncmp(version, "AMD Opteron(tm)", 15) == 0
|| strncmp(version, "Dual-Core AMD Opteron(tm)", 25) == 0)
- sig = 2;
- else
- return;
+ return cpuid_x86_amd;
}
- else /* neither X86 nor ARM */
- return;
- /*
- * Extra flags are now returned in the ECX register when one calls
- * the CPUID instruction. Their meaning is explained in table 3-5, but
- * DMI doesn't support this yet.
- */
- eax = DWORD(p);
- edx = DWORD(p + 4);
+ /* neither X86 nor ARM */
+ return cpuid_none;
+}
+
+void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...),
+ const char *label, enum cpuid_type sig, const u8 *p)
+{
+ u32 eax, midr, jep106, soc_revision;
+ u16 dx;
+
switch (sig)
{
- case 1: /* Intel */
+ case cpuid_80386:
+ dx = WORD(p);
+ /*
+ * 80386 have a different signature.
+ */
+ print_cb(label,
+ "Type %u, Family %u, Major Stepping %u, Minor Stepping %u",
+ dx >> 12, (dx >> 8) & 0xF,
+ (dx >> 4) & 0xF, dx & 0xF);
+ return;
+
+ case cpuid_80486:
+ dx = WORD(p);
+ print_cb(label,
+ "Type %u, Family %u, Model %u, Stepping %u",
+ (dx >> 12) & 0x3, (dx >> 8) & 0xF,
+ (dx >> 4) & 0xF, dx & 0xF);
+ return;
+
+ case cpuid_arm_legacy: /* ARM before SOC ID */
+ midr = DWORD(p);
+ /*
+ * The format of this field was not defined for ARM processors
+ * before version 3.1.0 of the SMBIOS specification, so we
+ * silently skip it if it reads all zeroes.
+ */
+ if (midr == 0)
+ return;
+ print_cb(label,
+ "Implementor 0x%02x, Variant 0x%x, Architecture %u, Part 0x%03x, Revision %u",
+ midr >> 24, (midr >> 20) & 0xF,
+ (midr >> 16) & 0xF, (midr >> 4) & 0xFFF, midr & 0xF);
+ return;
+
+ case cpuid_arm_soc_id: /* ARM with SOC ID */
+ /*
+ * If Soc ID is supported, the first DWORD is the JEP-106 code;
+ * the second DWORD is the SoC revision value.
+ */
+ jep106 = DWORD(p);
+ soc_revision = DWORD(p + 4);
+ /*
+ * According to SMC Calling Convention (SMCCC) v1.3 specification
+ * (https://developer.arm.com/documentation/den0028/d/), the format
+ * of the values returned by the SMCCC_ARCH_SOC_ID call is as follows:
+ *
+ * JEP-106 code for the SiP (SoC_ID_type == 0)
+ * Bit[31] must be zero
+ * Bits[30:24] JEP-106 bank index for the SiP
+ * Bits[23:16] JEP-106 identification code with parity bit for the SiP
+ * Bits[15:0] Implementation defined SoC ID
+ *
+ * SoC revision (SoC_ID_type == 1)
+ * Bit[31] must be zero
+ * Bits[30:0] SoC revision
+ */
pr_attr("Signature",
- "Type %u, Family %u, Model %u, Stepping %u",
- (eax >> 12) & 0x3,
- ((eax >> 20) & 0xFF) + ((eax >> 8) & 0x0F),
- ((eax >> 12) & 0xF0) + ((eax >> 4) & 0x0F),
- eax & 0xF);
+ "JEP-106 Bank 0x%02x Manufacturer 0x%02x, SoC ID 0x%04x, SoC Revision 0x%08x",
+ (jep106 >> 24) & 0x7F, (jep106 >> 16) & 0x7F, jep106 & 0xFFFF, soc_revision);
+ return;
+
+ case cpuid_x86_intel: /* Intel */
+ eax = DWORD(p);
+ /*
+ * Extra flags are now returned in the ECX register when
+ * one calls the CPUID instruction. Their meaning is
+ * explained in table 3-5, but DMI doesn't support this
+ * yet.
+ */
+ print_cb(label,
+ "Type %u, Family %u, Model %u, Stepping %u",
+ (eax >> 12) & 0x3,
+ ((eax >> 20) & 0xFF) + ((eax >> 8) & 0x0F),
+ ((eax >> 12) & 0xF0) + ((eax >> 4) & 0x0F),
+ eax & 0xF);
break;
- case 2: /* AMD, publication #25481 revision 2.28 */
- pr_attr("Signature", "Family %u, Model %u, Stepping %u",
- ((eax >> 8) & 0xF) + (((eax >> 8) & 0xF) == 0xF ? (eax >> 20) & 0xFF : 0),
- ((eax >> 4) & 0xF) | (((eax >> 8) & 0xF) == 0xF ? (eax >> 12) & 0xF0 : 0),
- eax & 0xF);
+
+ case cpuid_x86_amd: /* AMD, publication #25481 revision 2.28 */
+ eax = DWORD(p);
+ print_cb(label, "Family %u, Model %u, Stepping %u",
+ ((eax >> 8) & 0xF) + (((eax >> 8) & 0xF) == 0xF ? (eax >> 20) & 0xFF : 0),
+ ((eax >> 4) & 0xF) | (((eax >> 8) & 0xF) == 0xF ? (eax >> 12) & 0xF0 : 0),
+ eax & 0xF);
break;
+ default:
+ return;
}
+}
+
+static void dmi_processor_id(const struct dmi_header *h)
+{
+ /* Intel AP-485 revision 36, table 2-4 */
+ static const char *flags[32] = {
+ "FPU (Floating-point unit on-chip)", /* 0 */
+ "VME (Virtual mode extension)",
+ "DE (Debugging extension)",
+ "PSE (Page size extension)",
+ "TSC (Time stamp counter)",
+ "MSR (Model specific registers)",
+ "PAE (Physical address extension)",
+ "MCE (Machine check exception)",
+ "CX8 (CMPXCHG8 instruction supported)",
+ "APIC (On-chip APIC hardware supported)",
+ NULL, /* 10 */
+ "SEP (Fast system call)",
+ "MTRR (Memory type range registers)",
+ "PGE (Page global enable)",
+ "MCA (Machine check architecture)",
+ "CMOV (Conditional move instruction supported)",
+ "PAT (Page attribute table)",
+ "PSE-36 (36-bit page size extension)",
+ "PSN (Processor serial number present and enabled)",
+ "CLFSH (CLFLUSH instruction supported)",
+ NULL, /* 20 */
+ "DS (Debug store)",
+ "ACPI (ACPI supported)",
+ "MMX (MMX technology supported)",
+ "FXSR (FXSAVE and FXSTOR instructions supported)",
+ "SSE (Streaming SIMD extensions)",
+ "SSE2 (Streaming SIMD extensions 2)",
+ "SS (Self-snoop)",
+ "HTT (Multi-threading)",
+ "TM (Thermal monitor supported)",
+ NULL, /* 30 */
+ "PBE (Pending break enabled)" /* 31 */
+ };
+ const u8 *data = h->data;
+ const u8 *p = data + 0x08;
+ enum cpuid_type sig = dmi_get_cpuid_type(h);
+ u32 edx;
+
+ /*
+ * This might help learn about new processors supporting the
+ * CPUID instruction or another form of identification.
+ */
+ if (!(opt.flags & FLAG_QUIET))
+ pr_attr("ID", "%02X %02X %02X %02X %02X %02X %02X %02X",
+ p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+
+ dmi_print_cpuid(pr_attr, "Signature", sig, p);
+
+ if (sig != cpuid_x86_intel && sig != cpuid_x86_amd)
+ return;
edx = DWORD(p + 4);
if ((edx & 0xBFEFFBFF) == 0)
@@ -1355,10 +1429,13 @@ static const char *dmi_processor_upgrade(u8 code)
"Socket LGA2066",
"Socket BGA1392",
"Socket BGA1510",
- "Socket BGA1528" /* 0x3C */
+ "Socket BGA1528",
+ "Socket LGA4189",
+ "Socket LGA1200",
+ "Socket LGA4677" /* 0x3F */
};
- if (code >= 0x01 && code <= 0x3C)
+ if (code >= 0x01 && code <= 0x3F)
return upgrade[code - 0x01];
return out_of_spec;
}
@@ -1386,7 +1463,9 @@ static void dmi_processor_characteristics(const char *attr, u16 code)
"Hardware Thread",
"Execute Protection",
"Enhanced Virtualization",
- "Power/Performance Control" /* 7 */
+ "Power/Performance Control",
+ "128-bit Capable",
+ "Arm64 SoC ID" /* 9 */
};
if ((code & 0x00FC) == 0)
@@ -1396,7 +1475,7 @@ static void dmi_processor_characteristics(const char *attr, u16 code)
int i;
pr_list_start(attr, NULL);
- for (i = 2; i <= 7; i++)
+ for (i = 2; i <= 9; i++)
if (code & (1 << i))
pr_list_item("%s", characteristics[i - 2]);
pr_list_end();
@@ -1931,11 +2010,16 @@ static const char *dmi_slot_type(u8 code)
"MXM Type IV",
"MXM 3.0 Type A",
"MXM 3.0 Type B",
- "PCI Express 2 SFF-8639",
- "PCI Express 3 SFF-8639",
+ "PCI Express 2 SFF-8639 (U.2)",
+ "PCI Express 3 SFF-8639 (U.2)",
"PCI Express Mini 52-pin with bottom-side keep-outs",
"PCI Express Mini 52-pin without bottom-side keep-outs",
- "PCI Express Mini 76-pin" /* 0x23 */
+ "PCI Express Mini 76-pin",
+ "PCI Express 4 SFF-8639 (U.2)",
+ "PCI Express 5 SFF-8639 (U.2)",
+ "OCP NIC 3.0 Small Form Factor (SFF)",
+ "OCP NIC 3.0 Large Form Factor (LFF)",
+ "OCP NIC Prior to 3.0" /* 0x28 */
};
static const char *type_0x30[] = {
"CXL FLexbus 1.0" /* 0x30 */
@@ -1970,47 +2054,74 @@ static const char *dmi_slot_type(u8 code)
"PCI Express 4 x2",
"PCI Express 4 x4",
"PCI Express 4 x8",
- "PCI Express 4 x16" /* 0xBD */
+ "PCI Express 4 x16",
+ "PCI Express 5",
+ "PCI Express 5 x1",
+ "PCI Express 5 x2",
+ "PCI Express 5 x4",
+ "PCI Express 5 x8",
+ "PCI Express 5 x16",
+ "PCI Express 6+",
+ "EDSFF E1",
+ "EDSFF E3" /* 0xC6 */
};
/*
* Note to developers: when adding entries to these lists, check if
* function dmi_slot_id below needs updating too.
*/
- if (code >= 0x01 && code <= 0x23)
+ if (code >= 0x01 && code <= 0x28)
return type[code - 0x01];
if (code == 0x30)
return type_0x30[code - 0x30];
- if (code >= 0xA0 && code <= 0xBD)
+ if (code >= 0xA0 && code <= 0xC6)
return type_0xA0[code - 0xA0];
return out_of_spec;
}
-static const char *dmi_slot_bus_width(u8 code)
+/* If hide_unknown is set, return NULL instead of "Other" or "Unknown" */
+static const char *dmi_slot_bus_width(u8 code, int hide_unknown)
{
/* 7.10.2 */
static const char *width[] = {
- "", /* 0x01, "Other" */
- "", /* "Unknown" */
- "8-bit ",
- "16-bit ",
- "32-bit ",
- "64-bit ",
- "128-bit ",
- "x1 ",
- "x2 ",
- "x4 ",
- "x8 ",
- "x12 ",
- "x16 ",
- "x32 " /* 0x0E */
+ "Other", /* 0x01 */
+ "Unknown",
+ "8-bit",
+ "16-bit",
+ "32-bit",
+ "64-bit",
+ "128-bit",
+ "x1",
+ "x2",
+ "x4",
+ "x8",
+ "x12",
+ "x16",
+ "x32" /* 0x0E */
};
if (code >= 0x01 && code <= 0x0E)
+ {
+ if (code <= 0x02 && hide_unknown)
+ return NULL;
return width[code - 0x01];
+ }
return out_of_spec;
}
+static void dmi_slot_type_with_width(u8 type, u8 width)
+{
+ const char *type_str, *width_str;
+
+ type_str = dmi_slot_type(type);
+ width_str = dmi_slot_bus_width(width, 1);
+
+ if (width_str)
+ pr_attr("Type", "%s %s", width_str, type_str);
+ else
+ pr_attr("Type", "%s", type_str);
+}
+
static const char *dmi_slot_current_usage(u8 code)
{
/* 7.10.3 */
@@ -2091,6 +2202,13 @@ static void dmi_slot_id(u8 code1, u8 code2, u8 type)
case 0xBB: /* PCI Express 4 */
case 0xBC: /* PCI Express 4 */
case 0xBD: /* PCI Express 4 */
+ case 0xBE: /* PCI Express 5 */
+ case 0xBF: /* PCI Express 5 */
+ case 0xC0: /* PCI Express 5 */
+ case 0xC1: /* PCI Express 5 */
+ case 0xC2: /* PCI Express 5 */
+ case 0xC3: /* PCI Express 5 */
+ case 0xC4: /* PCI Express 6+ */
pr_attr("ID", "%u", code1);
break;
case 0x07: /* PCMCIA */
@@ -2116,7 +2234,10 @@ static void dmi_slot_characteristics(const char *attr, u8 code1, u8 code2)
"PME signal is supported", /* 0 */
"Hot-plug devices are supported",
"SMBus signal is supported",
- "PCIe slot bifurcation is supported" /* 3 */
+ "PCIe slot bifurcation is supported",
+ "Async/surprise removal is supported",
+ "Flexbus slot, CXL 1.0 capable",
+ "Flexbus slot, CXL 2.0 capable" /* 6 */
};
if (code1 & (1 << 0))
@@ -2131,7 +2252,7 @@ static void dmi_slot_characteristics(const char *attr, u8 code1, u8 code2)
for (i = 1; i <= 7; i++)
if (code1 & (1 << i))
pr_list_item("%s", characteristics1[i - 1]);
- for (i = 0; i <= 3; i++)
+ for (i = 0; i <= 6; i++)
if (code2 & (1 << i))
pr_list_item("%s", characteristics2[i]);
pr_list_end();
@@ -2153,13 +2274,88 @@ static void dmi_slot_peers(u8 n, const u8 *data)
for (i = 1; i <= n; i++, data += 5)
{
- sprintf(attr, "Peer Device %hu", i);
+ sprintf(attr, "Peer Device %hhu", (u8)i);
pr_attr(attr, "%04x:%02x:%02x.%x (Width %u)",
WORD(data), data[2], data[3] >> 3, data[3] & 0x07,
data[4]);
}
}
+static void dmi_slot_information(u8 type, u8 code)
+{
+ switch (type)
+ {
+ case 0x1F: /* PCI Express 2 */
+ case 0x20: /* PCI Express 3 */
+ case 0x21: /* PCI Express Mini */
+ case 0x22: /* PCI Express Mini */
+ case 0x23: /* PCI Express Mini */
+ case 0xA5: /* PCI Express */
+ case 0xA6: /* PCI Express */
+ case 0xA7: /* PCI Express */
+ case 0xA8: /* PCI Express */
+ case 0xA9: /* PCI Express */
+ case 0xAA: /* PCI Express */
+ case 0xAB: /* PCI Express 2 */
+ case 0xAC: /* PCI Express 2 */
+ case 0xAD: /* PCI Express 2 */
+ case 0xAE: /* PCI Express 2 */
+ case 0xAF: /* PCI Express 2 */
+ case 0xB0: /* PCI Express 2 */
+ case 0xB1: /* PCI Express 3 */
+ case 0xB2: /* PCI Express 3 */
+ case 0xB3: /* PCI Express 3 */
+ case 0xB4: /* PCI Express 3 */
+ case 0xB5: /* PCI Express 3 */
+ case 0xB6: /* PCI Express 3 */
+ case 0xB8: /* PCI Express 4 */
+ case 0xB9: /* PCI Express 4 */
+ case 0xBA: /* PCI Express 4 */
+ case 0xBB: /* PCI Express 4 */
+ case 0xBC: /* PCI Express 4 */
+ case 0xBD: /* PCI Express 4 */
+ case 0xBE: /* PCI Express 5 */
+ case 0xBF: /* PCI Express 5 */
+ case 0xC0: /* PCI Express 5 */
+ case 0xC1: /* PCI Express 5 */
+ case 0xC2: /* PCI Express 5 */
+ case 0xC3: /* PCI Express 5 */
+ case 0xC4: /* PCI Express 6+ */
+ if (code)
+ pr_attr("PCI Express Generation", "%u", code);
+ break;
+ }
+}
+
+static void dmi_slot_physical_width(u8 code)
+{
+ if (code)
+ pr_attr("Slot Physical Width", "%s",
+ dmi_slot_bus_width(code, 0));
+}
+
+static void dmi_slot_pitch(u16 code)
+{
+ if (code)
+ pr_attr("Pitch", "%u.%02u mm", code / 100, code % 100);
+}
+
+static const char *dmi_slot_height(u8 code)
+{
+ /* 7.10.3 */
+ static const char *height[] = {
+ "Not applicable", /* 0x00 */
+ "Other",
+ "Unknown",
+ "Full height",
+ "Low-profile" /* 0x04 */
+ };
+
+ if (code <= 0x04)
+ return height[code];
+ return out_of_spec;
+}
+
/*
* 7.11 On Board Devices Information (Type 10)
*/
@@ -2177,10 +2373,16 @@ static const char *dmi_on_board_devices_type(u8 code)
"Sound",
"PATA Controller",
"SATA Controller",
- "SAS Controller" /* 0x0A */
+ "SAS Controller",
+ "Wireless LAN",
+ "Bluetooth",
+ "WWAN",
+ "eMMC",
+ "NVMe Controller",
+ "UFS Controller" /* 0x10 */
};
- if (code >= 0x01 && code <= 0x0A)
+ if (code >= 0x01 && code <= 0x10)
return type[code - 0x01];
return out_of_spec;
}
@@ -2219,7 +2421,7 @@ static void dmi_oem_strings(const struct dmi_header *h)
for (i = 1; i <= count; i++)
{
- sprintf(attr, "String %hu", i);
+ sprintf(attr, "String %hhu", (u8)i);
pr_attr(attr, "%s",dmi_string(h, i));
}
}
@@ -2237,7 +2439,7 @@ static void dmi_system_configuration_options(const struct dmi_header *h)
for (i = 1; i <= count; i++)
{
- sprintf(attr, "Option %hu", i);
+ sprintf(attr, "Option %hhu", (u8)i);
pr_attr(attr, "%s",dmi_string(h, i));
}
}
@@ -2421,10 +2623,10 @@ static void dmi_event_log_descriptors(u8 count, u8 len, const u8 *p)
{
if (len >= 0x02)
{
- sprintf(attr, "Descriptor %hu", i + 1);
+ sprintf(attr, "Descriptor %d", i + 1);
pr_attr(attr, "%s",
dmi_event_log_descriptor_type(p[i * len]));
- sprintf(attr, "Data Format %hu", i + 1);
+ sprintf(attr, "Data Format %d", i + 1);
pr_attr(attr, "%s",
dmi_event_log_descriptor_format(p[i * len + 1]));
}
@@ -2639,10 +2841,12 @@ static const char *dmi_memory_device_type(u8 code)
"LPDDR4",
"Logical non-volatile device",
"HBM",
- "HBM2" /* 0x21 */
+ "HBM2",
+ "DDR5",
+ "LPDDR5" /* 0x23 */
};
- if (code >= 0x01 && code <= 0x21)
+ if (code >= 0x01 && code <= 0x23)
return type[code - 0x01];
return out_of_spec;
}
@@ -2684,12 +2888,22 @@ static void dmi_memory_device_type_detail(u16 code)
}
}
-static void dmi_memory_device_speed(const char *attr, u16 code)
+static void dmi_memory_device_speed(const char *attr, u16 code1, u32 code2)
{
- if (code == 0)
- pr_attr(attr, "Unknown");
+ if (code1 == 0xFFFF)
+ {
+ if (code2 == 0)
+ pr_attr(attr, "Unknown");
+ else
+ pr_attr(attr, "%lu MT/s", code2);
+ }
else
- pr_attr(attr, "%u MT/s", code);
+ {
+ if (code1 == 0)
+ pr_attr(attr, "Unknown");
+ else
+ pr_attr(attr, "%u MT/s", code1);
+ }
}
static void dmi_memory_technology(u8 code)
@@ -2948,12 +3162,14 @@ static const char *dmi_pointing_device_interface(u8 code)
static const char *interface_0xA0[] = {
"Bus Mouse DB-9", /* 0xA0 */
"Bus Mouse Micro DIN",
- "USB" /* 0xA2 */
+ "USB",
+ "I2C",
+ "SPI" /* 0xA4 */
};
if (code >= 0x01 && code <= 0x08)
return interface[code - 0x01];
- if (code >= 0xA0 && code <= 0xA2)
+ if (code >= 0xA0 && code <= 0xA4)
return interface_0xA0[code - 0xA0];
return out_of_spec;
}
@@ -3390,11 +3606,11 @@ static void dmi_memory_channel_devices(u8 count, const u8 *p)
for (i = 1; i <= count; i++)
{
- sprintf(attr, "Device %hu Load", i);
+ sprintf(attr, "Device %hhu Load", (u8)i);
pr_attr(attr, "%u", p[3 * i]);
if (!(opt.flags & FLAG_QUIET))
{
- sprintf(attr, "Device %hu Handle", i);
+ sprintf(attr, "Device %hhu Handle", (u8)i);
pr_attr(attr, "0x%04X", WORD(p + 3 * i + 1));
}
}
@@ -3707,16 +3923,16 @@ static void dmi_parse_protocol_record(u8 *rec)
* convenience. It could get passed from the SMBIOS
* header, but that's a lot of passing of pointers just
* to get that info, and the only thing it is used for is
- * to determine the endianess of the field. Since we only
+ * to determine the endianness of the field. Since we only
* do this parsing on versions of SMBIOS after 3.1.1, and the
- * endianess of the field is always little after version 2.6.0
+ * endianness of the field is always little after version 2.6.0
* we can just pick a sufficiently recent version here.
*/
dmi_system_uuid(pr_subattr, "Service UUID", &rdata[0], 0x311);
/*
* DSP0270: 8.6: Redfish Over IP Host IP Assignment Type
- * Note, using decimal indicies here, as the DSP0270
+ * Note, using decimal indices here, as the DSP0270
* uses decimal, so as to make it more comparable
*/
assign_val = rdata[16];
@@ -4011,6 +4227,53 @@ static void dmi_tpm_characteristics(u64 code)
}
/*
+ * 7.46 Firmware Inventory Information (Type 45)
+ */
+
+static void dmi_firmware_characteristics(u16 code)
+{
+ /* 7.46.3 */
+ static const char *characteristics[] = {
+ "Updatable", /* 0 */
+ "Write-Protect" /* 1 */
+ };
+ int i;
+
+ for (i = 0; i <= 1; i++)
+ pr_list_item("%s: %s", characteristics[i],
+ (code & (1 << i)) ? "Yes" : "No");
+}
+
+static const char *dmi_firmware_state(u8 code)
+{
+ /* 7.46.4 */
+ static const char *state[] = {
+ "Other", /* 0x01 */
+ "Unknown",
+ "Disabled",
+ "Enabled",
+ "Absent",
+ "Stand-by Offline",
+ "Stand-by Spare",
+ "Unavailable Offline" /* 0x08 */
+ };
+
+ if (code >= 0x01 && code <= 0x08)
+ return state[code - 0x01];
+ return out_of_spec;
+}
+
+static void dmi_firmware_components(u8 count, const u8 *p)
+{
+ int i;
+
+ pr_list_start("Associated Components", "%u", count);
+ for (i = 0; i < count; i++)
+ pr_list_item("0x%04X", WORD(p + sizeof(u16) * i));
+ pr_list_end();
+}
+
+/*
* Main
*/
@@ -4033,9 +4296,9 @@ static void dmi_decode(const struct dmi_header *h, u16 ver)
pr_attr("Release Date", "%s",
dmi_string(h, data[0x08]));
/*
- * On IA-64, the BIOS base address will read 0 because
- * there is no BIOS. Skip the base address and the
- * runtime size in this case.
+ * On IA-64 and UEFI-based systems, the BIOS base
+ * address will read 0 because there is no BIOS. Skip
+ * the base address and the runtime size in this case.
*/
if (WORD(data + 0x06) != 0)
{
@@ -4302,9 +4565,7 @@ static void dmi_decode(const struct dmi_header *h, u16 ver)
if (h->length < 0x0C) break;
pr_attr("Designation", "%s",
dmi_string(h, data[0x04]));
- pr_attr("Type", "%s%s",
- dmi_slot_bus_width(data[0x06]),
- dmi_slot_type(data[0x05]));
+ dmi_slot_type_with_width(data[0x05], data[0x06]);
pr_attr("Current Usage", "%s",
dmi_slot_current_usage(data[0x07]));
pr_attr("Length", "%s",
@@ -4319,8 +4580,15 @@ static void dmi_decode(const struct dmi_header *h, u16 ver)
if (h->length < 0x13) break;
pr_attr("Data Bus Width", "%u", data[0x11]);
pr_attr("Peer Devices", "%u", data[0x12]);
- if (h->length - 0x13 >= data[0x12] * 5)
- dmi_slot_peers(data[0x12], data + 0x13);
+ if (h->length < 0x13 + data[0x12] * 5) break;
+ dmi_slot_peers(data[0x12], data + 0x13);
+ if (h->length < 0x17 + data[0x12] * 5) break;
+ dmi_slot_information(data[0x05], data[0x13 + data[0x12] * 5]);
+ dmi_slot_physical_width(data[0x14 + data[0x12] * 5]);
+ dmi_slot_pitch(WORD(data + 0x15 + data[0x12] * 5));
+ if (h->length < 0x18 + data[0x12] * 5) break;
+ pr_attr("Height", "%s",
+ dmi_slot_height(data[0x17 + data[0x12] * 5]));
break;
case 10: /* 7.11 On Board Devices Information */
@@ -4451,7 +4719,12 @@ static void dmi_decode(const struct dmi_header *h, u16 ver)
dmi_memory_device_type(data[0x12]));
dmi_memory_device_type_detail(WORD(data + 0x13));
if (h->length < 0x17) break;
- dmi_memory_device_speed("Speed", WORD(data + 0x15));
+ /* If no module is present, the remaining fields are irrelevant */
+ if (WORD(data + 0x0C) == 0)
+ break;
+ dmi_memory_device_speed("Speed", WORD(data + 0x15),
+ h->length >= 0x5C ?
+ DWORD(data + 0x54) : 0);
if (h->length < 0x1B) break;
pr_attr("Manufacturer", "%s",
dmi_string(h, data[0x17]));
@@ -4468,7 +4741,9 @@ static void dmi_decode(const struct dmi_header *h, u16 ver)
pr_attr("Rank", "%u", data[0x1B] & 0x0F);
if (h->length < 0x22) break;
dmi_memory_device_speed("Configured Memory Speed",
- WORD(data + 0x20));
+ WORD(data + 0x20),
+ h->length >= 0x5C ?
+ DWORD(data + 0x58) : 0);
if (h->length < 0x28) break;
dmi_memory_voltage_value("Minimum Voltage",
WORD(data + 0x22));
@@ -5051,11 +5326,33 @@ static void dmi_decode(const struct dmi_header *h, u16 ver)
DWORD(data + 0x1B));
break;
- case 126: /* 7.44 Inactive */
+ case 45: /* 7.46 Firmware Inventory Information */
+ pr_handle_name("Firmware Inventory Information");
+ if (h->length < 0x18) break;
+ pr_attr("Firmware Component Name", "%s",
+ dmi_string(h, data[0x04]));
+ pr_attr("Firmware Version", "%s",
+ dmi_string(h, data[0x05]));
+ pr_attr("Firmware ID", "%s", dmi_string(h, data[0x07]));
+ pr_attr("Release Date", "%s", dmi_string(h, data[0x09]));
+ pr_attr("Manufacturer", "%s", dmi_string(h, data[0x0A]));
+ pr_attr("Lowest Supported Firmware Version", "%s",
+ dmi_string(h, data[0x0B]));
+ dmi_memory_size("Image Size", QWORD(data + 0x0C));
+ pr_list_start("Characteristics", NULL);
+ dmi_firmware_characteristics(WORD(data + 0x14));
+ pr_list_end();
+ pr_attr("State", "%s", dmi_firmware_state(data[0x16]));
+ if (h->length < 0x18 + data[0x17] * 2) break;
+ if (!(opt.flags & FLAG_QUIET))
+ dmi_firmware_components(data[0x17], data + 0x18);
+ break;
+
+ case 126:
pr_handle_name("Inactive");
break;
- case 127: /* 7.45 End Of Table */
+ case 127:
pr_handle_name("End Of Table");
break;
@@ -5142,6 +5439,51 @@ static void dmi_table_decode(u8 *buf, u32 len, u16 num, u16 ver, u32 flags)
u8 *data;
int i = 0;
+ /* First pass: Save specific values needed to decode OEM types */
+ data = buf;
+ while ((i < num || !num)
+ && data + 4 <= buf + len) /* 4 is the length of an SMBIOS structure header */
+ {
+ u8 *next;
+ struct dmi_header h;
+
+ to_dmi_header(&h, data);
+
+ /*
+ * If a short entry is found (less than 4 bytes), not only it
+ * is invalid, but we cannot reliably locate the next entry.
+ * Also stop at end-of-table marker if so instructed.
+ */
+ if (h.length < 4 ||
+ (h.type == 127 &&
+ (opt.flags & (FLAG_QUIET | FLAG_STOP_AT_EOT))))
+ break;
+ i++;
+
+ /* Look for the next handle */
+ next = data + h.length;
+ while ((unsigned long)(next - buf + 1) < len
+ && (next[0] != 0 || next[1] != 0))
+ next++;
+ next += 2;
+
+ /* Make sure the whole structure fits in the table */
+ if ((unsigned long)(next - buf) > len)
+ break;
+
+ /* Assign vendor for vendor-specific decodes later */
+ if (h.type == 1 && h.length >= 6)
+ dmi_set_vendor(_dmi_string(&h, data[0x04], 0),
+ _dmi_string(&h, data[0x05], 0));
+
+ /* Remember CPUID type for HPE type 199 */
+ if (h.type == 4 && h.length >= 0x1A && cpuid_type == cpuid_none)
+ cpuid_type = dmi_get_cpuid_type(&h);
+ data = next;
+ }
+
+ /* Second pass: Actually decode the data */
+ i = 0;
data = buf;
while ((i < num || !num)
&& data + 4 <= buf + len) /* 4 is the length of an SMBIOS structure header */
@@ -5201,10 +5543,6 @@ static void dmi_table_decode(u8 *buf, u32 len, u16 num, u16 ver, u32 flags)
break;
}
- /* assign vendor for vendor-specific decodes later */
- if (h.type == 1 && h.length >= 5)
- dmi_set_vendor(dmi_string(&h, data[0x04]));
-
/* Fixup a common mistake */
if (h.type == 34)
dmi_fixup_type_34(&h, display);
diff --git a/dmidecode.h b/dmidecode.h
index 1dc59a7..318cdc6 100644
--- a/dmidecode.h
+++ b/dmidecode.h
@@ -31,7 +31,23 @@ struct dmi_header
u8 *data;
};
+enum cpuid_type
+{
+ cpuid_none,
+ cpuid_80386,
+ cpuid_80486,
+ cpuid_arm_legacy,
+ cpuid_arm_soc_id,
+ cpuid_x86_intel,
+ cpuid_x86_amd,
+};
+
+extern enum cpuid_type cpuid_type;
+
int is_printable(const u8 *data, int len);
const char *dmi_string(const struct dmi_header *dm, u8 s);
+void dmi_print_memory_size(const char *addr, u64 code, int shift);
+void dmi_print_cpuid(void (*print_cb)(const char *name, const char *format, ...),
+ const char *label, enum cpuid_type sig, const u8 *p);
#endif
diff --git a/dmioem.c b/dmioem.c
index 60b6674..c26fff9 100644
--- a/dmioem.c
+++ b/dmioem.c
@@ -23,8 +23,10 @@
#include <string.h>
#include "types.h"
+#include "util.h"
#include "dmidecode.h"
#include "dmioem.h"
+#include "dmiopt.h"
#include "dmioutput.h"
/*
@@ -42,34 +44,46 @@ enum DMI_VENDORS
};
static enum DMI_VENDORS dmi_vendor = VENDOR_UNKNOWN;
+static const char *dmi_product = NULL;
/*
* Remember the system vendor for later use. We only actually store the
* value if we know how to decode at least one specific entry type for
* that vendor.
*/
-void dmi_set_vendor(const char *s)
+void dmi_set_vendor(const char *v, const char *p)
{
- int len;
+ const struct { const char *str; enum DMI_VENDORS id; } vendor[] = {
+ { "Acer", VENDOR_ACER },
+ { "HP", VENDOR_HP },
+ { "Hewlett-Packard", VENDOR_HP },
+ { "HPE", VENDOR_HPE },
+ { "Hewlett Packard Enterprise", VENDOR_HPE },
+ { "IBM", VENDOR_IBM },
+ { "LENOVO", VENDOR_LENOVO },
+ };
+ unsigned int i;
+ size_t len;
/*
* Often DMI strings have trailing spaces. Ignore these
* when checking for known vendor names.
*/
- len = strlen(s);
- while (len && s[len - 1] == ' ')
+ len = v ? strlen(v) : 0;
+ while (len && v[len - 1] == ' ')
len--;
- if (strncmp(s, "Acer", len) == 0)
- dmi_vendor = VENDOR_ACER;
- else if (strncmp(s, "HP", len) == 0 || strncmp(s, "Hewlett-Packard", len) == 0)
- dmi_vendor = VENDOR_HP;
- else if (strncmp(s, "HPE", len) == 0 || strncmp(s, "Hewlett Packard Enterprise", len) == 0)
- dmi_vendor = VENDOR_HPE;
- else if (strncmp(s, "IBM", len) == 0)
- dmi_vendor = VENDOR_IBM;
- else if (strncmp(s, "LENOVO", len) == 0)
- dmi_vendor = VENDOR_LENOVO;
+ for (i = 0; i < ARRAY_SIZE(vendor); i++)
+ {
+ if (strlen(vendor[i].str) == len &&
+ strncmp(v, vendor[i].str, len) == 0)
+ {
+ dmi_vendor = vendor[i].id;
+ break;
+ }
+ }
+
+ dmi_product = p;
}
/*
@@ -133,7 +147,7 @@ static void dmi_print_hp_net_iface_rec(u8 id, u8 bus, u8 dev, const u8 *mac)
if (id == 0xFF)
id = ++nic_ctr;
- sprintf(attr, "NIC %hu", id);
+ sprintf(attr, "NIC %hhu", id);
if (dev == 0x00 && bus == 0x00)
pr_attr(attr, "Disabled");
else if (dev == 0xFF && bus == 0xFF)
@@ -147,15 +161,347 @@ static void dmi_print_hp_net_iface_rec(u8 id, u8 bus, u8 dev, const u8 *mac)
}
}
+typedef enum { G6 = 6, G7, G8, G9, G10, G10P } dmi_hpegen_t;
+
+static int dmi_hpegen(const char *s)
+{
+ struct { const char *name; dmi_hpegen_t gen; } table[] = {
+ { "Gen10 Plus", G10P },
+ { "Gen10", G10 },
+ { "Gen9", G9 },
+ { "Gen8", G8 },
+ { "G7", G7 },
+ { "G6", G6 },
+ };
+ unsigned int i;
+
+ if (!strstr(s, "ProLiant") && !strstr(s, "Apollo") &&
+ !strstr(s, "Synergy") && !strstr(s, "Edgeline"))
+ return -1;
+
+ for (i = 0; i < ARRAY_SIZE(table); i++) {
+ if (strstr(s, table[i].name))
+ return(table[i].gen);
+ }
+
+ return (dmi_vendor == VENDOR_HPE) ? G10P : G6;
+}
+
+static void dmi_hp_240_attr(u64 defined, u64 set)
+{
+ static const char *attributes[] = {
+ "Updatable",
+ "Reset Required",
+ "Authentication Required",
+ "In Use",
+ "UEFI Image",
+ };
+ unsigned int i;
+
+ pr_attr("Attributes Defined/Set", NULL);
+ for (i = 0; i < ARRAY_SIZE(attributes); i++)
+ {
+ if (!(defined.l & (1UL << i)))
+ continue;
+ pr_subattr(attributes[i], "%s", set.l & (1UL << i) ? "Yes" : "No");
+ }
+}
+
+static void dmi_hp_203_assoc_hndl(const char *fname, u16 num)
+{
+ if (opt.flags & FLAG_QUIET)
+ return;
+
+ if (num == 0xFFFE)
+ pr_attr(fname, "N/A");
+ else
+ pr_attr(fname, "0x%04X", num);
+}
+
+static void dmi_hp_203_pciinfo(const char *fname, u16 num)
+{
+ if (num == 0xFFFF)
+ pr_attr(fname, "Device Not Present");
+ else
+ pr_attr(fname, "0x%04x", num);
+}
+
+static void dmi_hp_203_bayenc(const char *fname, u8 num)
+{
+ switch (num)
+ {
+ case 0x00:
+ pr_attr(fname, "Unknown");
+ break;
+ case 0xff:
+ pr_attr(fname, "Do Not Display");
+ break;
+ default:
+ pr_attr(fname, "%d", num);
+ }
+}
+
+static void dmi_hp_203_devtyp(const char *fname, unsigned int code)
+{
+ const char *str = "Reserved";
+ static const char *type[] = {
+ "Unknown", /* 0x00 */
+ "Reserved",
+ "Reserved",
+ "Flexible LOM",
+ "Embedded LOM",
+ "NIC in a Slot",
+ "Storage Controller",
+ "Smart Array Storage Controller",
+ "USB Hard Disk",
+ "Other PCI Device",
+ "RAM Disk",
+ "Firmware Volume",
+ "UEFI Shell",
+ "Generic UEFI USB Boot Entry",
+ "Dynamic Smart Array Controller",
+ "File",
+ "NVME Hard Drive",
+ "NVDIMM" /* 0x11 */
+ };
+
+ if (code < ARRAY_SIZE(type))
+ str = type[code];
+
+ pr_attr(fname, "%s", str);
+}
+
+static void dmi_hp_203_devloc(const char *fname, unsigned int code)
+{
+ const char *str = "Reserved";
+ static const char *location[] = {
+ "Unknown", /* 0x00 */
+ "Embedded",
+ "iLO Virtual Media",
+ "Front USB Port",
+ "Rear USB Port",
+ "Internal USB",
+ "Internal SD Card",
+ "Internal Virutal USB (Embedded NAND)",
+ "Embedded SATA Port",
+ "Embedded Smart Array",
+ "PCI Slot",
+ "RAM Memory",
+ "USB",
+ "Dynamic Smart Array Controller",
+ "URL",
+ "NVMe Drive Bay" /* 0x0F */
+ };
+
+ if (code < ARRAY_SIZE(location))
+ str = location[code];
+
+ pr_attr(fname, "%s", str);
+}
+
+static void dmi_hp_238_loc(const char *fname, unsigned int code)
+{
+ const char *str = "Reserved";
+ static const char *location[] = {
+ "Internal", /* 0x00 */
+ "Front of Server",
+ "Rear of Server",
+ "Embedded internal SD Card",
+ "iLO USB",
+ "HP NAND Controller (USX 2065 or other)",
+ "Reserved",
+ "Debug Port", /* 0x07 */
+ };
+
+ if (code < ARRAY_SIZE(location))
+ str = location[code];
+
+ pr_attr(fname, "%s", str);
+}
+
+static void dmi_hp_238_flags(const char *fname, unsigned int code)
+{
+ const char *str = "Reserved";
+ static const char *flags[] = {
+ "Not Shared", /* 0x00 */
+ "Shared with physical switch",
+ "Shared with automatic control", /* 0x02 */
+ };
+
+ if (code < ARRAY_SIZE(flags))
+ str = flags[code];
+
+ pr_attr(fname, "%s", str);
+}
+
+static void dmi_hp_238_speed(const char *fname, unsigned int code)
+{
+ const char *str = "Reserved";
+ static const char *speed[] = {
+ "Reserved", /* 0x00 */
+ "USB 1.1 Full Speed",
+ "USB 2.0 High Speed",
+ "USB 3.0 Super Speed" /* 0x03 */
+ };
+
+ if (code < ARRAY_SIZE(speed))
+ str = speed[code];
+
+ pr_attr(fname, "%s", str);
+}
+
static int dmi_decode_hp(const struct dmi_header *h)
{
u8 *data = h->data;
int nic, ptr;
u32 feat;
const char *company = (dmi_vendor == VENDOR_HP) ? "HP" : "HPE";
+ int gen;
+
+ gen = dmi_hpegen(dmi_product);
+ if (gen < 0)
+ return 0;
switch (h->type)
{
+ case 194:
+ /*
+ * Vendor Specific: Super IO Enable/Disable Features
+ *
+ * Offset | Name | Width | Description
+ * -------------------------------------
+ * 0x00 | Type | BYTE | 0xC2, Super IO Enable/Disable Indicator
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Dev Status | BYTE | Device Status
+ */
+ pr_handle_name("%s ProLiant Super IO Enable/Disable Indicator", company);
+ if (h->length < 0x05) break;
+ feat = data[0x04];
+ pr_attr("Serial Port A", "%s", feat & (1 << 0) ? "Enabled" : "Disabled");
+ pr_attr("Serial Port B", "%s", feat & (1 << 1) ? "Enabled" : "Disabled");
+ pr_attr("Parallel Port", "%s", feat & (1 << 2) ? "Enabled" : "Disabled");
+ pr_attr("Floppy Disk Port", "%s", feat & (1 << 3) ? "Enabled" : "Disabled");
+ pr_attr("Virtual Serial Port", "%s", feat & (1 << 4) ? "Enabled" : "Disabled");
+ break;
+
+ case 199:
+ /*
+ * Vendor Specific: CPU Microcode Patch
+ *
+ * Offset | Name | Width | Description
+ * -------------------------------------
+ * 0x00 | Type | BYTE | 0xC7, CPU Microcode Patch
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Patch Info | Varies| { <DWORD: ID, DWORD Date, DWORD CPUID> ...}
+ */
+ if (gen < G9) return 0;
+ pr_handle_name("%s ProLiant CPU Microcode Patch Support Info", company);
+
+ for (ptr = 0x4; ptr + 12 <= h->length; ptr += 12) {
+ u32 cpuid = DWORD(data + ptr + 2 * 4);
+ u32 date;
+
+ /* AMD omits BaseFamily. Reconstruction valid on family >= 15. */
+ if (cpuid_type == cpuid_x86_amd)
+ cpuid = ((cpuid & 0xfff00) << 8) | 0x0f00 | (cpuid & 0xff);
+
+ dmi_print_cpuid(pr_attr, "CPU ID", cpuid_type, (u8 *) &cpuid);
+
+ date = DWORD(data + ptr + 4);
+ pr_subattr("Date", "%04x-%02x-%02x",
+ date & 0xffff, (date >> 24) & 0xff, (date >> 16) & 0xff);
+ pr_subattr("Patch", "0x%X", DWORD(data + ptr));
+ }
+ break;
+
+ case 203:
+ /*
+ * Vendor Specific: HP Device Correlation Record
+ *
+ * Offset | Name | Width | Description
+ * -------------------------------------
+ * 0x00 | Type | BYTE | 0xCB, Correlation Record
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Assoc Device | WORD | Handle of Associated Type 9 or Type 41 Record
+ * 0x06 | Assoc SMBus | WORD | Handle of Associated Type 228 SMBus Segment Record
+ * 0x08 | PCI Vendor ID| WORD | PCI Vendor ID of device 0xFFFF -> not present
+ * 0x0A | PCI Device ID| WORD | PCI Device ID of device 0xFFFF -> not present
+ * 0x0C | PCI SubVendor| WORD | PCI Sub Vendor ID of device 0xFFFF -> not present
+ * 0x0E | PCI SubDevice| WORD | PCI Sub Device ID of device 0xFFFF -> not present
+ * 0x10 | Class Code | BYTE | PCI Class Code of Endpoint. 0xFF if device not present.
+ * 0x11 | Class SubCode| BYTE | PCI Sub Class Code of Endpoint. 0xFF if device not present.
+ * 0x12 | Parent Handle| WORD |
+ * 0x14 | Flags | WORD |
+ * 0x16 | Device Type | BYTE | UEFI only
+ * 0x17 | Device Loc | BYTE | Device Location
+ * 0x18 | Dev Instance | BYTE | Device Instance
+ * 0x19 | Sub Instance | BYTE | NIC Port # or NVMe Drive Bay
+ * 0x1A | Bay | BYTE |
+ * 0x1B | Enclosure | BYTE |
+ * 0x1C | UEFI Dev Path| STRING| String number for UEFI Device Path
+ * 0x1D | Struct Name | STRING| String number for UEFI Device Structured Name
+ * 0x1E | Device Name | STRING| String number for UEFI Device Name
+ * 0x1F | UEFI Location| STRING| String number for UEFI Location
+ * 0x20 | Assoc Handle | WORD | Type 9 Handle. Defined if Flags[0] == 1.
+ * 0x22 | Part Number | STRING| PCI Device Part Number
+ * 0x23 | Serial Number| STRING| PCI Device Serial Number
+ * 0x24 | Seg Number | WORD | Segment Group number. 0 -> Single group topology
+ * 0x26 | Bus Number | BYTE | PCI Device Bus Number
+ * 0x27 | Func Number | BTYE | PCI Device and Function Number
+ */
+ if (gen < G9) return 0;
+ pr_handle_name("%s Device Correlation Record", company);
+ if (h->length < 0x1F) break;
+ dmi_hp_203_assoc_hndl("Associated Device Record", WORD(data + 0x04));
+ dmi_hp_203_assoc_hndl("Associated SMBus Record", WORD(data + 0x06));
+ if (WORD(data + 0x08) == 0xffff && WORD(data + 0x0A) == 0xffff &&
+ WORD(data + 0x0C) == 0xffff && WORD(data + 0x0E) == 0xffff &&
+ data[0x10] == 0xFF && data[0x11] == 0xFF)
+ {
+ pr_attr("PCI Device Info", "Device Not Present");
+ }
+ else
+ {
+ dmi_hp_203_pciinfo("PCI Vendor ID", WORD(data + 0x08));
+ dmi_hp_203_pciinfo("PCI Device ID", WORD(data + 0x0A));
+ dmi_hp_203_pciinfo("PCI Sub Vendor ID", WORD(data + 0x0C));
+ dmi_hp_203_pciinfo("PCI Sub Device ID", WORD(data + 0x0E));
+ dmi_hp_203_pciinfo("PCI Class Code", (char)data[0x10]);
+ dmi_hp_203_pciinfo("PCI Sub Class Code", (char)data[0x11]);
+ }
+ dmi_hp_203_assoc_hndl("Parent Handle", WORD(data + 0x12));
+ pr_attr("Flags", "0x%04X", WORD(data + 0x14));
+ dmi_hp_203_devtyp("Device Type", data[0x16]);
+ dmi_hp_203_devloc("Device Location", data[0x17]);
+ pr_attr("Device Instance", "%d", data[0x18]);
+ pr_attr("Device Sub-Instance", "%d", data[0x19]);
+ dmi_hp_203_bayenc("Bay", data[0x1A]);
+ dmi_hp_203_bayenc("Enclosure", data[0x1B]);
+ pr_attr("Device Path", "%s", dmi_string(h, data[0x1C]));
+ pr_attr("Structured Name", "%s", dmi_string(h, data[0x1D]));
+ pr_attr("Device Name", "%s", dmi_string(h, data[0x1E]));
+ if (h->length < 0x22) break;
+ pr_attr("UEFI Location", "%s", dmi_string(h, data[0x1F]));
+ if (!(opt.flags & FLAG_QUIET))
+ {
+ if (WORD(data + 0x14) & 1)
+ pr_attr("Associated Real/Phys Handle", "0x%04X",
+ WORD(data + 0x20));
+ else
+ pr_attr("Associated Real/Phys Handle", "N/A");
+ }
+ if (h->length < 0x24) break;
+ pr_attr("PCI Part Number", "%s", dmi_string(h, data[0x22]));
+ pr_attr("Serial Number", "%s", dmi_string(h, data[0x23]));
+ if (h->length < 0x28) break;
+ pr_attr("Segment Group Number", "0x%04x", WORD(data + 0x24));
+ pr_attr("PCI Device", "%02x:%02x.%x",
+ data[0x26], data[0x27] >> 3, data[0x27] & 7);
+ break;
+
case 204:
/*
* Vendor Specific: HPE ProLiant System/Rack Locator
@@ -208,35 +554,6 @@ static int dmi_decode_hp(const struct dmi_header *h)
}
break;
- case 233:
- /*
- * Vendor Specific: HPE ProLiant NIC MAC Information
- *
- * This prints the BIOS NIC number,
- * PCI bus/device/function, and MAC address
- *
- * Offset | Name | Width | Description
- * -------------------------------------
- * 0x00 | Type | BYTE | 0xE9, NIC structure
- * 0x01 | Length | BYTE | Length of structure
- * 0x02 | Handle | WORD | Unique handle
- * 0x04 | Grp No | WORD | 0 for single segment
- * 0x06 | Bus No | BYTE | PCI Bus
- * 0x07 | Dev No | BYTE | PCI Device/Function No
- * 0x08 | MAC | 32B | MAC addr padded w/ 0s
- * 0x28 | Port No| BYTE | Each NIC maps to a Port
- */
- pr_handle_name("%s BIOS PXE NIC PCI and MAC Information",
- company);
- if (h->length < 0x0E) break;
- /* If the record isn't long enough, we don't have an ID
- * use 0xFF to use the internal counter.
- * */
- nic = h->length > 0x28 ? data[0x28] : 0xFF;
- dmi_print_hp_net_iface_rec(nic, data[0x06], data[0x07],
- &data[0x08]);
- break;
-
case 212:
/*
* Vendor Specific: HPE 64-bit CRU Information
@@ -282,6 +599,177 @@ static int dmi_decode_hp(const struct dmi_header *h)
pr_subattr("UEFI", "%s", feat & 0x1400 ? "Yes" : "No");
break;
+ case 233:
+ /*
+ * Vendor Specific: HPE ProLiant NIC MAC Information
+ *
+ * This prints the BIOS NIC number,
+ * PCI bus/device/function, and MAC address
+ *
+ * Offset | Name | Width | Description
+ * -------------------------------------
+ * 0x00 | Type | BYTE | 0xE9, NIC structure
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Grp No | WORD | 0 for single segment
+ * 0x06 | Bus No | BYTE | PCI Bus
+ * 0x07 | Dev No | BYTE | PCI Device/Function No
+ * 0x08 | MAC | 32B | MAC addr padded w/ 0s
+ * 0x28 | Port No| BYTE | Each NIC maps to a Port
+ */
+ pr_handle_name("%s BIOS PXE NIC PCI and MAC Information",
+ company);
+ if (h->length < 0x0E) break;
+ /* If the record isn't long enough, we don't have an ID
+ * use 0xFF to use the internal counter.
+ * */
+ nic = h->length > 0x28 ? data[0x28] : 0xFF;
+ dmi_print_hp_net_iface_rec(nic, data[0x06], data[0x07],
+ &data[0x08]);
+ break;
+
+ case 236:
+ /*
+ * Vendor Specific: HPE ProLiant HDD Backplane
+ *
+ * Offset | Name | Width | Description
+ * ---------------------------------------
+ * 0x00 | Type | BYTE | 0xEC, HDD Backplane
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | I2C Address| BYTE | Backplane FRU I2C Address
+ * 0x05 | Box Number | WORD | Backplane Box Number
+ * 0x07 | NVRAM ID | WORD | Backplane NVRAM ID
+ * 0x09 | WWID | QWORD | SAS Expander WWID
+ * 0x11 | Total Bays | BYTE | Total SAS Bays
+ * 0x12 | A0 Bays | BYTE | (deprecated) Number of SAS drive bays behind port 0xA0
+ * 0x13 | A2 Bays | BYTE | (deprecated) Number of SAS drive bays behind port 0xA2
+ * 0x14 | Name | STRING| (deprecated) Backplane Name
+ */
+ pr_handle_name("%s HDD Backplane FRU Information", company);
+ if (h->length < 0x08) break;
+ pr_attr("FRU I2C Address", "0x%X raw(0x%X)", data[0x4] >> 1, data[0x4]);
+ pr_attr("Box Number", "%d", WORD(data + 0x5));
+ pr_attr("NVRAM ID", "0x%X", WORD(data + 0x7));
+ if (h->length < 0x11) break;
+ pr_attr("SAS Expander WWID", "0x%X", QWORD(data + 0x9));
+ if (h->length < 0x12) break;
+ pr_attr("Total SAS Bays", "%d", data[0x11]);
+ if (h->length < 0x15) break;
+ if (gen < G10P) {
+ pr_attr("A0 Bay Count", "%d", data[0x12]);
+ pr_attr("A2 Bay Count", "%d", data[0x13]);
+ pr_attr("Backplane Name", "%s", dmi_string(h, data[0x14]));
+ }
+ break;
+
+ case 237:
+ /*
+ * Vendor Specific: HPE DIMM Vendor Part Number Information
+ *
+ * Offset | Name | Width | Description
+ * ---------------------------------------
+ * 0x00 | Type | BYTE | 0xED, DIMM Vendor Part Number information record
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Hand Assoc | WORD | Handle to map to Type 17
+ * 0x06 | Manufacture|STRING | DIMM Manufacturer
+ * 0x07 | Part Number|STRING | DIMM Manufacturer's Part Number
+ * 0x08 | Serial Num |STRING | DIMM Vendor Serial Number
+ * 0x09 | Spare Part |STRING | DIMM Spare Part Number
+ */
+ if (gen < G9) return 0;
+ pr_handle_name("%s DIMM Vendor Information", company);
+ if (h->length < 0x08) break;
+ if (!(opt.flags & FLAG_QUIET))
+ pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4));
+ pr_attr("DIMM Manufacturer", "%s", dmi_string(h, data[0x06]));
+ pr_attr("DIMM Manufacturer Part Number", "%s", dmi_string(h, data[0x07]));
+ if (h->length < 0x09) break;
+ pr_attr("DIMM Vendor Serial Number", "%s", dmi_string(h, data[0x08]));
+ if (h->length < 0x0A) break;
+ pr_attr("DIMM Spare Part Number", "%s", dmi_string(h, data[0x09]));
+ break;
+
+ case 238:
+ /*
+ * Vendor Specific: HPE USB Port Connector Correlation Record
+ *
+ * Offset | Name | Width | Description
+ * ---------------------------------------
+ * 0x00 | Type | BYTE | 0xEE, HP Device Correlation Record
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Hand Assoc | WORD | Handle to map to Type 8
+ * 0x06 | Parent Bus | BYTE | PCI Bus number of USB controller of this port
+ * 0x07 | Par Dev/Fun| BYTE | PCI Dev/Fun of USB Controller of this port
+ * 0x08 | Location | BYTE | Enumerated value of location of USB port
+ * 0x09 | Flags | WORD | USB Shared Management Port
+ * 0x0B | Port Inst | BYTE | Instance number for this type of USB port
+ * 0x0C | Parent Hub | BYTE | Instance number of internal Hub
+ * 0x0D | Port Speed | BYTE | Enumerated value of speed configured by BIOS
+ * 0x0E | Device Path| STRING| UEFI Device Path of USB endpoint
+ */
+ if (gen < G9) return 0;
+ pr_handle_name("%s Proliant USB Port Connector Correlation Record", company);
+ if (h->length < 0x0F) break;
+ if (!(opt.flags & FLAG_QUIET))
+ pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4));
+ pr_attr("PCI Device", "%02x:%02x.%x", data[0x6],
+ data[0x7] >> 3, data[0x7] & 0x7);
+ dmi_hp_238_loc("Location", data[0x8]);
+ dmi_hp_238_flags("Management Port", WORD(data + 0x9));
+ pr_attr("Port Instance", "%d", data[0xB]);
+ if (data[0xC] != 0xFE)
+ pr_attr("Parent Hub Port Instance", "%d", data[0xC]);
+ else
+ pr_attr("Parent Hub Port Instance", "N/A");
+ dmi_hp_238_speed("Port Speed Capability", data[0xD]);
+ pr_attr("Device Path", "%s", dmi_string(h, data[0xE]));
+ break;
+
+ case 240:
+ /*
+ * Vendor Specific: HPE Proliant Inventory Record
+ *
+ * Reports firmware version information for devices that report their
+ * firmware using their UEFI drivers. Additionally provides association
+ * with other SMBIOS records, such as Type 203 (which in turn is
+ * associated with Types 9, 41, and 228).
+ *
+ * Offset | Name | Width | Description
+ * ---------------------------------------
+ * 0x00 | Type | BYTE | 0xF0, HP Firmware Inventory Record
+ * 0x01 | Length | BYTE | Length of structure
+ * 0x02 | Handle | WORD | Unique handle
+ * 0x04 | Hndl Assoc | WORD | Handle to map to Type 203
+ * 0x06 | Pkg Vers | DWORD | FW Vers Release of All FW in Device
+ * 0x0A | Ver String | STRING| FW Version String
+ * 0x0B | Image Size | QWORD | FW image size (bytes)
+ * 0x13 | Attributes | QWORD | Bitfield: Is attribute defined?
+ * 0x1B | Attr Set | QWORD | BitField: If defined, is attribute set?
+ * 0x23 | Version | DWORD | Lowest supported version.
+ */
+ pr_handle_name("%s Proliant Inventory Record", company);
+ if (h->length < 0x27) break;
+ if (!(opt.flags & FLAG_QUIET))
+ pr_attr("Associated Handle", "0x%04X", WORD(data + 0x4));
+ pr_attr("Package Version", "0x%08X", DWORD(data + 0x6));
+ pr_attr("Version String", "%s", dmi_string(h, data[0x0A]));
+
+ if (DWORD(data + 0x0B))
+ dmi_print_memory_size("Image Size", QWORD(data + 0xB), 0);
+ else
+ pr_attr("Image Size", "Not Available");
+
+ dmi_hp_240_attr(QWORD(data + 0x13), QWORD(data + 0x1B));
+
+ if (DWORD(data + 0x23))
+ pr_attr("Lowest Supported Version", "0x%08X", DWORD(data + 0x23));
+ else
+ pr_attr("Lowest Supported Version", "Not Available");
+ break;
+
default:
return 0;
}
diff --git a/dmioem.h b/dmioem.h
index 3916766..b79b769 100644
--- a/dmioem.h
+++ b/dmioem.h
@@ -21,5 +21,5 @@
struct dmi_header;
-void dmi_set_vendor(const char *s);
+void dmi_set_vendor(const char *s, const char *p);
int dmi_decode_oem(const struct dmi_header *h);
diff --git a/man/biosdecode.8 b/man/biosdecode.8
index cf7d4db..b0996d7 100644
--- a/man/biosdecode.8
+++ b/man/biosdecode.8
@@ -5,7 +5,7 @@ biosdecode \- \s-1BIOS\s0 information decoder
.\"
.SH SYNOPSIS
.B biosdecode
-.RB [ OPTIONS ]
+.RI [ OPTIONS ]
.\"
.SH DESCRIPTION
.B biosdecode
@@ -59,11 +59,12 @@ program.
.\"
.SH OPTIONS
.TP
-.BR "-d" ", " "--dev-mem FILE"
-Read memory from device \fBFILE\fR (default: \fB/dev/mem\fR)
+.BR "-d" ", " "--dev-mem \fIFILE\fP"
+Read memory from device \fIFILE\fP (default: \fI/dev/mem\fP)
.TP
-.BR " " " " "--pir full"
-Decode the details of the PCI IRQ routing table
+.BR " " " " "--pir \fBfull\fP"
+Decode the details of the PCI IRQ routing table.
+Only \fBfull\fP mode is supported.
.TP
.BR "-h" ", " "--help"
Display usage information and exit
diff --git a/man/dmidecode.8 b/man/dmidecode.8
index 64dc7e7..ed066b3 100644
--- a/man/dmidecode.8
+++ b/man/dmidecode.8
@@ -5,7 +5,7 @@ dmidecode \- \s-1DMI\s0 table decoder
.\"
.SH SYNOPSIS
.B dmidecode
-.RB [ OPTIONS ]
+.RI [ OPTIONS ]
.\"
.SH DESCRIPTION
.B dmidecode
@@ -63,35 +63,53 @@ and serial number.
.\"
.SH OPTIONS
.TP
-.BR "-d" ", " "--dev-mem FILE"
-Read memory from device \fBFILE\fR (default: \fB/dev/mem\fR)
+.BR "-d" ", " "--dev-mem \fIFILE\fP"
+Read memory from device \fIFILE\fP (default: \fI/dev/mem\fP)
.TP
.BR "-q" ", " "--quiet"
Be less verbose. Unknown, inactive and \s-1OEM\s0-specific entries are not
displayed. Meta-data and handle references are hidden.
.TP
-.BR "-s" ", " "--string KEYWORD"
-Only display the value of the \s-1DMI\s0 string identified by \fBKEYWORD\fR.
-\fBKEYWORD\fR must be a keyword from the following list: \fBbios-vendor\fR,
-\fBbios-version\fR, \fBbios-release-date\fR,
-\fBbios-revision\fR, \fBfirmware-revision\fR,
-\fBsystem-manufacturer\fR, \fBsystem-product-name\fR,
-\fBsystem-version\fR, \fBsystem-serial-number\fR,
-\fBsystem-uuid\fR, \fBsystem-sku-number\fR, \fBsystem-family\fR,
-\fBbaseboard-manufacturer\fR, \fBbaseboard-product-name\fR,
-\fBbaseboard-version\fR, \fBbaseboard-serial-number\fR,
-\fBbaseboard-asset-tag\fR, \fBchassis-manufacturer\fR,
-\fBchassis-type\fR,
-\fBchassis-version\fR, \fBchassis-serial-number\fR,
-\fBchassis-asset-tag\fR, \fBprocessor-family\fR,
-\fBprocessor-manufacturer\fR,
-\fBprocessor-version\fR, \fBprocessor-frequency\fR.
+.BR "-s" ", " "--string \fIKEYWORD\fP"
+Only display the value of the \s-1DMI\s0 string identified by \fIKEYWORD\fP.
+It must be a keyword from the following list:
+.nh
+.BR bios\-vendor ,
+.BR bios\-version ,
+.BR bios\-release\-date ,
+.BR bios\-revision ,
+.BR firmware\-revision ,
+.BR system\-manufacturer ,
+.BR system\-product\-name ,
+.BR system\-version ,
+.BR system\-serial\-number ,
+.BR system\-uuid ,
+.BR system\-sku\-number ,
+.BR system\-family ,
+.BR baseboard\-manufacturer ,
+.BR baseboard\-product\-name ,
+.BR baseboard\-version ,
+.BR baseboard\-serial\-number ,
+.BR baseboard\-asset\-tag ,
+.BR chassis\-manufacturer ,
+.BR chassis\-type ,
+.BR chassis\-version ,
+.BR chassis\-serial\-number ,
+.BR chassis\-asset\-tag ,
+.BR processor\-family ,
+.BR processor\-manufacturer ,
+.BR processor\-version ,
+.BR processor\-frequency .
+.hy
Each keyword corresponds to a given \s-1DMI\s0 type and a given offset
within this entry type.
Not all strings may be meaningful or even defined on all systems. Some
keywords may return more than one result on some systems (e.g.
-\fBprocessor-version\fR on a multi-processor system).
-If \fBKEYWORD\fR is not provided or not valid, a list of all valid
+.nh
+.B processor\-version
+.hy
+on a multi-processor system).
+If \fIKEYWORD\fP is not provided or not valid, a list of all valid
keywords is printed and
.B dmidecode
exits with an error.
@@ -104,23 +122,32 @@ typically from files under
.IR /sys/devices/virtual/dmi/id .
Most of these files are even readable by regular users.
.TP
-.BR "-t" ", " "--type TYPE"
-Only display the entries of type \fBTYPE\fR. \fBTYPE\fR can be either a
+.BR "-t" ", " "--type \fITYPE\fP"
+Only display the entries of type \fITYPE\fP. It can be either a
\s-1DMI\s0 type number, or a comma-separated list of type numbers, or a
-keyword from the following list: \fBbios\fR, \fBsystem\fR,
-\fBbaseboard\fR, \fBchassis\fR, \fBprocessor\fR, \fBmemory\fR,
-\fBcache\fR, \fBconnector\fR, \fBslot\fR. Refer to the DMI TYPES section
-below for details.
+keyword from the following list:
+.nh
+.BR bios ,
+.BR system ,
+.BR baseboard ,
+.BR chassis ,
+.BR processor ,
+.BR memory ,
+.BR cache ,
+.BR connector ,
+.BR slot .
+.hy
+Refer to the DMI TYPES section below for details.
If this option is used more than once, the set of displayed entries will be
the union of all the given types.
-If \fBTYPE\fR is not provided or not valid, a list of all valid keywords
+If \fITYPE\fP is not provided or not valid, a list of all valid keywords
is printed and
.B dmidecode
exits with an error.
.TP
-.BR "-H" ", " "--handle HANDLE"
-Only display the entry whose handle matches \fBHANDLE\fR. \fBHANDLE\fR
-is a 16-bit integer.
+.BR "-H" ", " "--handle \fIHANDLE\fP"
+Only display the entry whose handle matches \fIHANDLE\fP.
+\fIHANDLE\fP is a 16-bit integer.
.TP
.BR "-u" ", " "--dump"
Do not decode the entries, dump their contents as hexadecimal instead.
@@ -128,22 +155,22 @@ Note that this is still a text output, no binary data will be thrown upon
you. The strings attached to each entry are displayed as both
hexadecimal and \s-1ASCII\s0. This option is mainly useful for debugging.
.TP
-.BR " " " " "--dump-bin FILE"
+.BR " " " " "--dump-bin \fIFILE\fP"
Do not decode the entries, instead dump the DMI data to a file in binary
-form. The generated file is suitable to pass to \fB--from-dump\fR
+form. The generated file is suitable to pass to \fB--from-dump\fP
later.
.TP
-.BR " " " " "--from-dump FILE"
-Read the DMI data from a binary file previously generated using
-\fB--dump-bin\fR.
+.BR " " " " "--from-dump \fIFILE\fP"
+Read the DMI data from a binary file previously generated using
+\fB--dump-bin\fP.
.TP
.BR " " " " "--no-sysfs"
Do not attempt to read DMI data from sysfs files. This is mainly useful for
debugging.
.TP
-.BR " " " " "--oem-string N"
-Only display the value of the \s-1OEM\s0 string number \fBN\fR. The first
-\s-1OEM\s0 string has number 1. With special value "count", return the
+.BR " " " " "--oem-string \fIN\fP"
+Only display the value of the \s-1OEM\s0 string number \fIN\fP. The first
+\s-1OEM\s0 string has number \fB1\fP. With special value \fBcount\fP, return the
number of OEM strings instead.
.TP
.BR "-h" ", " "--help"
@@ -152,7 +179,10 @@ Display usage information and exit
.BR "-V" ", " "--version"
Display the version and exit
.P
-Options --string, --type, --dump-bin and --oem-string
+Options
+.BR --string ,
+.BR --type,
+.BR --dump-bin " and " --oem-string
determine the output format and are mutually exclusive.
.P
Please note in case of
@@ -220,7 +250,7 @@ end-of-table marker. Types 128 to 255 are for \s-1OEM\s0-specific data.
will display these entries by default, but it can only decode them
when the vendors have contributed documentation or code for them.
-Keywords can be used instead of type numbers with \fB--type\fR.
+Keywords can be used instead of type numbers with \fB--type\fP.
Each keyword is equivalent to a list of type numbers:
.TS
@@ -250,7 +280,7 @@ dmidecode --type bios
dmidecode --type BIOS
.\"
.SH BINARY DUMP FILE FORMAT
-The binary dump files generated by --dump-bin and read using --from-dump
+The binary dump files generated by \fB--dump-bin\fP and read using \fB--from-dump\fP
are formatted as follows:
.IP \(bu "\w'\(bu'u+1n"
The SMBIOS or DMI entry point is located at offset 0x00.
diff --git a/man/ownership.8 b/man/ownership.8
index 71ed788..2742300 100644
--- a/man/ownership.8
+++ b/man/ownership.8
@@ -5,7 +5,7 @@ ownership \- Compaq ownership tag retriever
.\"
.SH SYNOPSIS
.B ownership
-.RB [ OPTIONS ]
+.RI [ OPTIONS ]
.\"
.SH DESCRIPTION
.B ownership
@@ -19,8 +19,8 @@ ownership tag. This should help its integration in scripts.
.\"
.SH OPTIONS
.TP
-.BR "-d" ", " "--dev-mem FILE"
-Read memory from device \fBFILE\fR (default: \fB/dev/mem\fR)
+.BR "-d" ", " "--dev-mem \fIFILE\fP"
+Read memory from device \fIFILE\fP (default: \fI/dev/mem\fP)
.TP
.BR "-h" ", " "--help"
Display usage information and exit
diff --git a/man/vpddecode.8 b/man/vpddecode.8
index 1cc2b76..44901ad 100644
--- a/man/vpddecode.8
+++ b/man/vpddecode.8
@@ -5,7 +5,7 @@ vpddecode \- \s-1VPD\s0 structure decoder
.\"
.SH SYNOPSIS
.B vpddecode
-.RB [ OPTIONS ]
+.RI [ OPTIONS ]
.\"
.SH DESCRIPTION
.B vpddecode
@@ -32,30 +32,35 @@ the accuracy of these labels is welcome.
.\"
.SH OPTIONS
.TP
-.BR "-d" ", " "--dev-mem FILE"
-Read memory from device \fBFILE\fR (default: \fB/dev/mem\fR)
+.BR "-d" ", " "--dev-mem \fIFILE\fP"
+Read memory from device \fIFILE\fP (default: \fI/dev/mem\fP)
.TP
-.BR "-s" ", " "--string KEYWORD"
-Only display the value of the \s-1VPD\s0 string identified by \fBKEYWORD\fR.
-\fBKEYWORD\fR must be a keyword from the following list: \fBbios-build-id\fR,
-\fBbox-serial-number\fR, \fBmotherboard-serial-number\fR,
-\fBmachine-type-model\fR, \fBbios-release-date\fR.
+.BR "-s" ", " "--string \fIKEYWORD\fP"
+Only display the value of the \s-1VPD\s0 string identified by \fIKEYWORD\fP.
+It must be a keyword from the following list:
+.nh
+.BR bios-build-id ,
+.BR box-serial-number ,
+.BR motherboard-serial-number ,
+.BR machine-type-model ,
+.BR bios-release-date .
+.hy
Each keyword corresponds to an offset and a length within the \s-1VPD\s0
record.
Not all strings may be defined on all \s-1VPD\s0-enabled systems.
-If \fBKEYWORD\fR is not provided or not valid, a list of all valid
+If \fIKEYWORD\fP is not provided or not valid, a list of all valid
keywords is printed and
.B vpddecode
exits with an error.
This option cannot be used more than once.
-Mutually exclusive with \fB--dump\fR.
+Mutually exclusive with \fB--dump\fP.
.TP
.BR "-u" ", " "--dump"
Do not decode the VPD records, dump their contents as hexadecimal instead.
Note that this is still a text output, no binary data will be thrown upon
you. ASCII equivalent is displayed when possible. This option is mainly
useful for debugging.
-Mutually exclusive with \fB--string\fR.
+Mutually exclusive with \fB--string\fP.
.TP
.BR "-h" ", " "--help"
Display usage information and exit
diff --git a/version.h b/version.h
index e466454..3f8431b 100644
--- a/version.h
+++ b/version.h
@@ -1 +1 @@
-#define VERSION "3.3"
+#define VERSION "3.4"