diff options
Diffstat (limited to 'gnulib-m4/host-cpu-c-abi.m4')
-rw-r--r-- | gnulib-m4/host-cpu-c-abi.m4 | 89 |
1 files changed, 88 insertions, 1 deletions
diff --git a/gnulib-m4/host-cpu-c-abi.m4 b/gnulib-m4/host-cpu-c-abi.m4 index a467514..3fac6f7 100644 --- a/gnulib-m4/host-cpu-c-abi.m4 +++ b/gnulib-m4/host-cpu-c-abi.m4 @@ -1,4 +1,4 @@ -# host-cpu-c-abi.m4 serial 9 +# host-cpu-c-abi.m4 serial 10 dnl Copyright (C) 2002-2018 Free Software Foundation, Inc. dnl This file is free software; the Free Software Foundation dnl gives unlimited permission to copy and/or distribute it, @@ -237,6 +237,60 @@ changequote([,])dnl gl_cv_host_cpu_c_abi=powerpc ;; + riscv32 | riscv64 ) + # There are 2 architectures (with variants): rv32* and rv64*. + AC_COMPILE_IFELSE( + [AC_LANG_SOURCE( + [[#if __riscv_xlen == 64 + int ok; + #else + error fail + #endif + ]])], + [cpu=riscv64], + [cpu=riscv32]) + # There are 6 ABIs: ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d. + # Size of 'long' and 'void *': + AC_COMPILE_IFELSE( + [AC_LANG_SOURCE( + [[#if defined __LP64__ + int ok; + #else + error fail + #endif + ]])], + [main_abi=lp64], + [main_abi=ilp32]) + # Float ABIs: + # __riscv_float_abi_double: + # 'float' and 'double' are passed in floating-point registers. + # __riscv_float_abi_single: + # 'float' are passed in floating-point registers. + # __riscv_float_abi_soft: + # No values are passed in floating-point registers. + AC_COMPILE_IFELSE( + [AC_LANG_SOURCE( + [[#if defined __riscv_float_abi_double + int ok; + #else + error fail + #endif + ]])], + [float_abi=d], + [AC_COMPILE_IFELSE( + [AC_LANG_SOURCE( + [[#if defined __riscv_float_abi_single + int ok; + #else + error fail + #endif + ]])], + [float_abi=f], + [float_abi='']) + ]) + gl_cv_host_cpu_c_abi="${cpu}-${main_abi}${float_abi}" + ;; + s390* ) # On s390x, the C compiler may be generating 64-bit (= s390x) code # or 31-bit (= s390) code. @@ -349,6 +403,39 @@ EOF #ifndef __powerpc64_elfv2__ #undef __powerpc64_elfv2__ #endif +#ifndef __riscv32__ +#undef __riscv32__ +#endif +#ifndef __riscv64__ +#undef __riscv64__ +#endif +#ifndef __riscv32_ilp32__ +#undef __riscv32_ilp32__ +#endif +#ifndef __riscv32_ilp32f__ +#undef __riscv32_ilp32f__ +#endif +#ifndef __riscv32_ilp32d__ +#undef __riscv32_ilp32d__ +#endif +#ifndef __riscv64_ilp32__ +#undef __riscv64_ilp32__ +#endif +#ifndef __riscv64_ilp32f__ +#undef __riscv64_ilp32f__ +#endif +#ifndef __riscv64_ilp32d__ +#undef __riscv64_ilp32d__ +#endif +#ifndef __riscv64_lp64__ +#undef __riscv64_lp64__ +#endif +#ifndef __riscv64_lp64f__ +#undef __riscv64_lp64f__ +#endif +#ifndef __riscv64_lp64d__ +#undef __riscv64_lp64d__ +#endif #ifndef __s390__ #undef __s390__ #endif |